7th ACM SIGPLAN Workshop on Transactional Computing
February 26, 2012
New Orleans, LA, USA
(co-located with PPoPP 2012)

The past decade has seen an explosion of interest in programming languages, systems, and hardware to support transactions, speculation, and related alternatives to classical lock-based concurrency. In the last year alone, significant progress has been made toward integrating transactional memory support into mainstream programming languages, like C++ and Scala, and hardware transactional memory support has been announced for a next-generation microprocessor.

This workshop, the seventh in its series, will provide a forum for the presentation of research on all aspects of transactional computing. The scope of the workshop is intentionally broad, with the goal of encouraging interaction across the languages, architecture, systems, database, and theory communities. Papers may address implementation techniques, foundational results, applications and workloads, or experience with working systems. Environments of interest include the full range from multithreaded or multicore processors to high-end parallel computing.

Topics
The workshop seeks papers on topics related to all areas of software and hardware for transactional computing. Specific topics of interest include but are not limited to: Papers should present original research. As transactional memory spans many disciplines, papers should provide sufficient background material to make them accessible to the broader community. Papers focused on foundations should indicate how the work can be used to advance practice; papers on experiences and applications should indicate how the experiments reinforce or reflect principles.
Call for Papers
HTML PDF
Submissions

Please use this link to access the submission website.

Papers must be submitted in PDF, and be no more than 7 pages in standard two-column SIGPLAN conference format, excluding bibliography (but including all figures, appendices, etc.). Submissions must be made through the on-line submission site. Final papers will be available to participants electronically at the meeting, but to facilitate resubmission to more formal venues, no archival proceedings will be published, and papers will not be sent to the ACM Digital Library.

Authors will have the option of having their final paper accessible from the workshop website. Authors must be familiar with and abide by SIGPLAN's republication policy, which forbids simultaneous submission to multiple venues and requires disclosing prior publication of closely related work.

At the discretion of the program committee and with the consent of the authors, particularly worthy papers may be recommended for a special journal issue.

Registration and Workshop Information
Please see the PPoPP homepage for information about registration, hotels, local attractions, etc.
Accepted Papers
Program
8:30 — 10:00
A case for Exiting a Transaction in the Context of Hardware Transactional Memory (pdf)
Isuru Herath, Demian Rosas, Mikel Lujan and Ian Watson
Transactional Prefetching: Narrowing the Window of Contention in Hardware Transactional Memory (pdf)
Adrià Armejach, Anurag Negi, Adrián Cristal, Osman S. Unsal and Per Stenstrom
MSpec: A Design Pattern for Concurrent Data Structures (pdf)
Lingxiang Xiang and Michael Scott
10:00 — 10:30
Break
10:30 — 12:00
FastLane: Streamlining Transactions for Low Thread Counts (pdf)
Jons-Tobias Wamhoff, Pascal Felber, Christof Fetzer, Gilles Muller and Etienne Rivière.
Sandboxing Transactional Memory (pdf)
Luke Dalessandro and Michael Scott
Towards a Fully Pessimistic STM Model (pdf)
Alexander Matveev and Nir Shavit
12:00 — 1:30
Lunch
1:30 — 3:30
Transactions are Back---but How Different They Are? (pdf)
Hagit Attiya and Sandeep Hans
On Closed Nesting in Distributed Software Transactional Memory (pdf)
Alexandru Turcu, Binoy Ravindran and Mohamed Saad
Unmanaged Multiversion STM (pdf)
Li Lu and Michael L. Scott
Parallel nesting in a lock-free multi-version Software Transactional Memory (pdf)
Nuno Diegues, Sérgio Fernandes and João Cachopo
3:30 — 4:00:
Break
4:00 — 5:00
Panel: "Now that we've got hardware TM, what should we do with it?"
Important Dates
Program Committee
Steering Committee